fidl_next_codec/wire/
mod.rs

1// Copyright 2024 The Fuchsia Authors. All rights reserved.
2// Use of this source code is governed by a BSD-style license that can be
3// found in the LICENSE file.
4
5mod boxed;
6mod empty_struct;
7mod envelope;
8mod ptr;
9mod result;
10mod string;
11mod table;
12mod union;
13mod vec;
14
15pub use self::boxed::*;
16pub use self::empty_struct::*;
17pub use self::envelope::*;
18pub use self::ptr::*;
19pub use self::result::*;
20pub use self::string::*;
21pub use self::table::*;
22pub use self::union::*;
23pub use self::vec::*;
24
25use core::mem::MaybeUninit;
26
27use crate::{
28    Unconstrained, WireF32, WireF64, WireI16, WireI32, WireI64, WireU16, WireU32, WireU64,
29};
30
31/// A FIDL wire type.
32///
33/// # Safety
34///
35/// - References to data yielded by `Self::Owned<'de>` must not outlive `'de`.
36/// - `zero_padding` must write zeroes to (at least) the padding bytes of `out`.
37pub unsafe trait Wire: 'static + Sized {
38    /// The owned wire type, restricted to the `'de` lifetime.
39    type Owned<'de>: 'de;
40
41    /// Writes zeroes to the padding for this type, if any.
42    fn zero_padding(out: &mut MaybeUninit<Self>);
43}
44
45macro_rules! impl_primitive {
46    ($ty:ty) => {
47        unsafe impl Wire for $ty {
48            type Owned<'de> = Self;
49
50            #[inline]
51            fn zero_padding(_: &mut MaybeUninit<Self>) {}
52        }
53
54        impl Unconstrained for $ty {}
55    };
56}
57
58macro_rules! impl_primitives {
59    ($($ty:ty),* $(,)?) => {
60        $(
61            impl_primitive!($ty);
62        )*
63    }
64}
65
66impl_primitives! {
67    (),
68    bool,
69    i8, WireI16, WireI32, WireI64,
70    u8, WireU16, WireU32, WireU64,
71    WireF32, WireF64,
72}
73
74unsafe impl<T: Wire, const N: usize> Wire for [T; N] {
75    type Owned<'de> = [T::Owned<'de>; N];
76
77    #[inline]
78    fn zero_padding(out: &mut MaybeUninit<Self>) {
79        for i in 0..N {
80            let out_i = unsafe { &mut *out.as_mut_ptr().cast::<MaybeUninit<T>>().add(i) };
81            T::zero_padding(out_i);
82        }
83    }
84}
fidl_next_codec/wire/mod.rs

fidl_next_codec/wire/
mod.rs
