fidl_fuchsia_process_lifecycle__common/
fidl_fuchsia_process_lifecycle__common.rs

1// WARNING: This file is machine generated by fidlgen.
2
3#![warn(clippy::all)]
4#![allow(unused_parens, unused_mut, unused_imports, nonstandard_style)]
5
6use bitflags::bitflags;
7use fidl::encoding::{MessageBufFor, ProxyChannelBox, ResourceDialect};
8use futures::future::{self, MaybeDone, TryFutureExt};
9use zx_status;
10
11pub mod lifecycle_ordinals {
12    pub const STOP: u64 = 0x64b176f1744c6f15;
13    pub const ON_ESCROW: u64 = 0x3de9c2fcb734ed48;
14}
15
16mod internal {
17    use super::*;
18}