fidl_fuchsia_net_debug__common/
fidl_fuchsia_net_debug__common.rs

1// WARNING: This file is machine generated by fidlgen.
2
3#![warn(clippy::all)]
4#![allow(unused_parens, unused_mut, unused_imports, nonstandard_style)]
5
6use bitflags::bitflags;
7use fidl::encoding::{MessageBufFor, ProxyChannelBox, ResourceDialect};
8use futures::future::{self, MaybeDone, TryFutureExt};
9use zx_status;
10
11pub mod diagnostics_ordinals {
12    pub const LOG_DEBUG_INFO_TO_SYSLOG: u64 = 0x336c39330bd8e1ac;
13    pub const GET_PROCESS_HANDLE_FOR_INSPECTION: u64 = 0x563e5df030f2f4d5;
14}
15
16pub mod interfaces_ordinals {
17    pub const GET_PORT: u64 = 0xdd15c4df17fb148;
18}
19
20mod internal {
21    use super::*;
22}